Publications
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Conference Papers
[5] Vinay Chenna and Hossein Hashemi, “A Nonintuitively Frequency-Staggered Wideband mm-Wave Low-Noise Amplifier” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2026 (Accepted).
[5] Vinay Chenna and Hossein Hashemi, “A Nonintuitively Frequency-Staggered Wideband mm-Wave Low-Noise Amplifier” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2026 (Accepted).
[4] Vinay Chenna and Hossein Hashemi, “An Inverse-Designed Passively Coupled N-Path Filter with gm-Boosted Active HBT Switches” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2026 (Accepted).
[4] Vinay Chenna and Hossein Hashemi, “An Inverse-Designed Passively Coupled N-Path Filter with gm-Boosted Active HBT Switches” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2026 (Accepted).
[3] Vinay Chenna and Hossein Hashemi, “Topology-Optimized Nonintuitive Multilayered mm-Wave Power Amplifiers,” in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, June 2025 (Best Student Paper Award First Place). (slides) (preprint)
[3] Vinay Chenna and Hossein Hashemi, “Topology-Optimized Nonintuitive Multilayered mm-Wave Power Amplifiers,” in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, June 2025 (Best Student Paper Award First Place). (slides) (preprint)
[2] Vinay Chenna and Hossein Hashemi, “Algorithmic Design of Nonintuitive On-Chip Multilayered Passive Networks,” in IEEE International Microwave Symposium (IMS), June 2025. (slides) (preprint)
[2] Vinay Chenna and Hossein Hashemi, “Algorithmic Design of Nonintuitive On-Chip Multilayered Passive Networks,” in IEEE International Microwave Symposium (IMS), June 2025. (slides) (preprint)
[1] C. Yang, S. Su, M. Ayesh, S. Mahapatra, M. Hamada, Vinay Chenna, H. Hashemi, Mike Chen, “A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with -36dB EVM in 28nm CMOS,” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2025.
[1] C. Yang, S. Su, M. Ayesh, S. Mahapatra, M. Hamada, Vinay Chenna, H. Hashemi, Mike Chen, “A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with -36dB EVM in 28nm CMOS,” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2025.
Journal Papers
[3] Vinay Chenna and Hossein Hashemi, “Coming Soon,” in IEEE Journal of Solid-State Circuits (JSSC), (invited, under revision)
[3] Vinay Chenna and Hossein Hashemi, “Coming Soon,” in IEEE Journal of Solid-State Circuits (JSSC), (invited, under revision)
[2] Vinay Chenna and Hossein Hashemi, “Algorithmic Design and Optimization of On-Chip Multilayered Pixelated Passive Networks,” in IEEE Transactions on Microwave Theory and Techniques (T-MTT), Nov. 2025. (invited) (preprint)
[2] Vinay Chenna and Hossein Hashemi, “Algorithmic Design and Optimization of On-Chip Multilayered Pixelated Passive Networks,” in IEEE Transactions on Microwave Theory and Techniques (T-MTT), Nov. 2025. (invited) (preprint)
[1] C. Yang, S. Su, M. Ayesh, S. Mahapatra, M. Hamada, Vinay Chenna, H. Hashemi, Mike Chen, “A Blocker-Tolerant Receiver With VCO-Based Non-Uniform Multi-Level Time-Approximation Filter,” in IEEE Journal of Solid-State Circuits (JSSC), Sept. 2025. (invited)
[1] C. Yang, S. Su, M. Ayesh, S. Mahapatra, M. Hamada, Vinay Chenna, H. Hashemi, Mike Chen, “A Blocker-Tolerant Receiver With VCO-Based Non-Uniform Multi-Level Time-Approximation Filter,” in IEEE Journal of Solid-State Circuits (JSSC), Sept. 2025. (invited)
Patents
Coming soon!
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