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[3] Vinay Chenna and Hossein Hashemi, “Topology-Optimized Nonintuitive Multilayered mm-Wave Power Amplifiers,” in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, June 2025 (Best Student Paper Award Finalist).
[3] Vinay Chenna and Hossein Hashemi, “Topology-Optimized Nonintuitive Multilayered mm-Wave Power Amplifiers,” in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, June 2025 (Best Student Paper Award Finalist).
[2] Vinay Chenna and Hossein Hashemi, “Algorithmic Design of Nonintuitive On-Chip Multilayered Passive Networks,” in IEEE International Microwave Symposium (IMS), June 2025.
[2] Vinay Chenna and Hossein Hashemi, “Algorithmic Design of Nonintuitive On-Chip Multilayered Passive Networks,” in IEEE International Microwave Symposium (IMS), June 2025.
[1] C. Yang, S. Su, M. Ayesh, S. Mahapatra, M. Hamada, Vinay Chenna, H. Hashemi, Mike Chen, “A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with -36dB EVM in 28nm CMOS,” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2025.
[1] C. Yang, S. Su, M. Ayesh, S. Mahapatra, M. Hamada, Vinay Chenna, H. Hashemi, Mike Chen, “A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with -36dB EVM in 28nm CMOS,” in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2025.
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